Greg Byrd

Bio

Dr. Byrd’s primary research is in the areas of quantum computing and high-performance parallel systems. He is interested in mechanisms which reduce communication overhead in parallel and distributed systems. Other areas of interest include computer architecture, network processing, service-oriented computing, and network security.

Before joining NC State, Dr. Byrd was a principal scientist at Celotek Corporation, where he developed software and protocols for the CellCase family of encryptors for ATM networks. He also worked at MCNC, in both the NC Supercomputing Center and the High Performance Computation and Communications group.

Area(s) of Expertise

Quantum Information Science and Engineering
Computer Architecture and Systems

Publications

• Q2SV: A High‐Level Synthesis Approach for State Vector Quantum Simulation , Quantum Engineering (2025)
• Achieving Forward Progress Guarantee in Small Hardware Transactions , IEEE COMPUTER ARCHITECTURE LETTERS (2024)
• Analyzing Quantum Circuit Depth Reduction with Ancilla Qubits in MCX Gates , 2024 IEEE International Conference on Quantum Computing and Engineering (QCE) (2024)
• Solving the B-SAT Problem Using Quantum Computing: Smaller Is Sometimes Better , (2024)
• Solving the B-SAT Problem Using Quantum Computing: Smaller Is Sometimes Better , ENTROPY (2024)
• Solving the B-SAT Problem Using Quantum Computing: Smaller is Sometimes Better , 2024 60th Annual Allerton Conference on Communication, Control, and Computing (2024)
• The road to quantum internet: Progress in quantum network testbeds and major demonstrations , PROGRESS IN QUANTUM ELECTRONICS (2024)
• Crosstalk-Based Parameterized Quantum Circuit Approximation , IEEE International Conference on Quantum Computing and Engineering (2023)
• Exploring Architecture of Qiskit Runtime for Educational Enablement , 2023 IEEE INTERNATIONAL CONFERENCE ON QUANTUM COMPUTING AND ENGINEERING, QCE (2023)
• PreFlush: Lightweight Hardware Prediction Mechanism for Cache Line Flush and Writeback , 2023 32ND INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES, PACT (2023)

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